As ICs increase in size and speed with the development of the semiconductor industry, their use is affected by new factors that become progressively more limiting with increasing size. Two such factors are power consumption and operating temperature. Clearly, a large number of active gates consumes more power than a small number of active gates. Also, increasing speed (e.g., clock frequency) leads to greater power consumption because of the increased number of signal transitions per unit of time. This increase in power consumption not only reduces the usefulness of ICs in battery-powered systems, it also causes the temperature of the systems to increase, potentially to the point of affecting the system operation, or even damaging the IC or other hardware. Power consumption and temperature control are therefore important issues to IC and system designers.
Temperature sensors have previously been used in a limited fashion to reduce power consumption in ICs. Inagaki, in U.S. Pat. No. 4,716,551, entitled "Semiconductor Memory Device with Variable Self-Refresh Cycle", which is incorporated herein by reference, describes a semiconductor memory device with an internal refresh circuit. The memory device includes a timer circuit that generates two signals with different frequencies. One of these signals is selected to be used as a refresh request signal for the memory cells in the memory device. The signal with a shorter cycle is selected at a high temperature (i.e., when there is most leakage in the memory cells), and the signal with a longer cycle is selected at a low temperature (i.e., when there is less leakage in the memory cells). The optional use of the longer cycle refresh signal reduces power consumption in the memory device at low temperatures.
It is desirable to provide a more extensive and flexible system and method for reducing power consumption in ICs as a function of temperature. It is further desirable to obtain a finer control of power consumption than is provided by the two-state system of Inagaki.